Product Features | |
Converting input signals to TMDS with non-sync regulation | |
VESA data format. (T3M&P for higher bit transmission) | |
LVDS data latch at falling edge of transmit clock frequency of max. 85MHz. | |
No EDID supported |
Specification | |
FR-LVDS8-V | Board for 24-bit single LVDS to VGA-15 pin connector. |
FR-LVDS8-W | Board for 24-bit single LVDS to VGA-Wafer connector. |
Downloads | |
FR-LVDS8-V/W User Manul | Download |